Registers: Difference between revisions
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== | == TNINE CPU == | ||
<big> | <big> | ||
| Line 5: | Line 5: | ||
* B¹ | * B¹ | ||
* C¹ | * C¹ | ||
* | * X² | ||
* | * Y² | ||
* | * Z² | ||
** Z+A² | ** Z+A² | ||
* PC² | * PC² | ||
Latest revision as of 13:23, 18 May 2025
TNINE CPU
- A¹
- B¹
- C¹
- X²
- Y²
- Z²
- Z+A²
- PC²
- SP¹
- SF¹
