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== Circuitverse ==
=== Circuitverse ===
* Optimizing Multiplier to Speed Up Result Output
* Optimizing Multiplier to Speed Up Result Output
** Parallelizing Adds (A+B)+(C+D)+(E+F)
** Parallelizing Adds (A+B)+(C+D)+(E+F)
Line 5: Line 5:
** Karatsuba Algorithm?
** Karatsuba Algorithm?


== Hung Up On ==
=== Hung Up On ===
* Opcodes Operands Addressing Modes
* Opcodes Operands Addressing Modes
** Choosing Registers
** Choosing Registers
Line 12: Line 12:
** Choosing Addressing Modes
** Choosing Addressing Modes


== Exploring Ideas ==
=== Exploring Ideas ===
* Expanding from 6-trit to 9-trit. (In progress!)
* Expanding from 6-trit to 9-trit. (In progress!)
** Instruction decoding would be easier. 6 trits for opcode and 3 trits for addressing mode.
** Instruction decoding would be easier. 6 trits for opcode and 3 trits for addressing mode.
** Although 7 trits would be interesting. 5 trits for opcode and 2 trits for addressing mode.
** Although 7 trits would be interesting. 5 trits for opcode and 2 trits for addressing mode.
** Odd length widths would solve a thing.
** Odd length widths would solve a thing.

Latest revision as of 20:08, 10 May 2025

Circuitverse

  • Optimizing Multiplier to Speed Up Result Output
    • Parallelizing Adds (A+B)+(C+D)+(E+F)
    • Multiplier Specific Carry Select Adder
    • Karatsuba Algorithm?

Hung Up On

  • Opcodes Operands Addressing Modes
    • Choosing Registers
    • Choosing Instructions
      • Ordering Instructions
    • Choosing Addressing Modes

Exploring Ideas

  • Expanding from 6-trit to 9-trit. (In progress!)
    • Instruction decoding would be easier. 6 trits for opcode and 3 trits for addressing mode.
    • Although 7 trits would be interesting. 5 trits for opcode and 2 trits for addressing mode.
    • Odd length widths would solve a thing.