Index: Difference between revisions
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<td style="vertical-align: text-top;"> | <td style="vertical-align: text-top;"> | ||
* '''+2 Input''' | * '''+2 Input''' | ||
* [[ | * [[USUM (Ternary Gate)|SUM]] | ||
* [[ | * [[UCON (Ternary Gate)|CON]] | ||
* [[ | * [[UCAD (Ternary Gate)|CAD]] | ||
</td> | </td> | ||
</tr> | </tr> | ||
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* [[MUL (BCT)|MUL]] | * [[MUL (BCT)|MUL]] | ||
* [[SUM (BCT)|SUM]] | * [[SUM (BCT)|SUM]] | ||
* [[ | * [[RDN (BCT)|RDN]] | ||
* [[ | * [[RUP (BCT)|RUP]] | ||
</div> | </div> | ||
<div class="mainpage_box"> | <div class="mainpage_box"> | ||
=== Logic === | === Logic === | ||
* [[MUX (BCT)|MUX]] | * [[MUX (BCT)|MUX]] | ||
Latest revision as of 11:36, 5 March 2026
TNINE Balanced Ternary Computer
Hobby Project
Ternary Logic Gates
| Balanced | Unsigned |
|---|---|
Logic
Processor
Computer
Programming
Other Implementations
Binary-Coded Ternary Circuits
Logic
Operations
