TernaryWiki

TNINE Balanced Ternary Computer

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Wiki

• About
• Project Goals
• Current Focus
• Ternary vs Binary
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Ternary Logic Gates

• +2 Input
  • SUM
  • CON
  • ANY
  • EOR
  • COM
  • MIN
  • MAX

• 1 Input
  • NEG
  • DEC
  • INC
  • NTB
  • PTB

Binary Logic Gates

• +2 Input
  • XOR
  • AND
  • OR

• 1 Input
  • NOT

Logic

• Full Adder

Ternary Compute

• Shift
• Rotate
• Add
• Multiply

Processor

• Registers
• ALU
• Instructions
• Instruction Set Map
• Memory
• IO

Computer

• Terminal
• Data Storage

Programming

• Heptavintimal
• Construct
• T Language

Implementation

• Binary-Coded Ternary
• CircuitVerse.org Logic Sim Projects

Other Implementations

• Low Open High
• NZP
• FPGA
• Custom Chip

Binary-Coded Ternary Circuits

Gates

• NEG
• ANY
• CON
• EOR
• SUM
• INC
• DEC

Logic

• MUX
• Half Adder
• Full Adder

Operations

• Adder
• Multiplier
• Shifts