Main public logs

Combined display of all available logs of TernaryWiki. You can narrow down the view by selecting a log type, the username (case-sensitive), or the affected page (also case-sensitive).

• 10:59, 12 May 2025 MrDyne talk contribs created page Rotate (Ternary) (Created page with "<big><b>Register Rotate</b></big> Rotate left and right works very similar to Shift but what gets shifted out gets shifted in on the other end. Rotate up and down increment and decrement all trits. There are Logical and Arithmetic rotates where the ALU barrow/carry flag trit is excluded or included.")
• 10:49, 12 May 2025 MrDyne talk contribs created page Shift (Ternary) (Created page with "<big><b>Register Shift</b></big> Register shift, shifts all trits to the left or right. What is shifted in can be selected; negative, zero, positive. == Uses == A left shift will cube the result. A right shift will cube-root the result. === Logical === Logical shifts exclude the ALU barrow/carry flag trit. === Arithmetic === Arithmetic shifts include the ALU barrow/carry flag trit.")
• 00:29, 4 May 2025 MrDyne talk contribs created page PTB (Ternary Gate) (Created page with "<big><b>Positive Threshold Buffer</b></big> == Uses == Converts a ternary value into a true/false (binary) output. == Truth Table == thumb|alt=TempImage|TempImage <div class="tt"> <table class="tt"> <tr> <td colspan="2">PTB</td> </tr> <tr> <td class="tt_bb"><b>A</b></td> <td class="tt_bl tt_bb"><b>Y</b></td> </tr> <tr> <td class="tt_r">-</td> <td class="tt_bl tt_r">-</td> </tr> <tr> <td class="tt_g">0</td> <td...")
• 00:24, 4 May 2025 MrDyne talk contribs created page NTB (Ternary Gate) (Created page with "<big><b>Negative Threshold Buffer</b></big> == Uses == Converts a ternary value into a true/false output. == Truth Table == thumb|alt=TempImage|TempImage <div class="tt"> <table class="tt"> <tr> <td colspan="2">NTB</td> </tr> <tr> <td class="tt_bb"><b>A</b></td> <td class="tt_bl tt_bb"><b>Y</b></td> </tr> <tr> <td class="tt_r">-</td> <td class="tt_bl tt_r">-</td> </tr> <tr> <td class="tt_g">0</td> <td class="t...")
• 16:51, 30 April 2025 MrDyne talk contribs created page User:MrDyne (Created page with "<big>"The name's Dyne...... MrDyne."</big> MrDyne is just my internet username and persona. I have a background in computers, computer repair, electronics technology, and tech support. I work in tech support. My hobbies have always revolved around technology and computers. Have a fascination for new and old technology. Quite the knowledge of tech before my time.")
• 20:24, 18 April 2025 MrDyne talk contribs created page TernaryWiki:About (Redirected page to About) Tag: New redirect
• 20:23, 18 April 2025 MrDyne talk contribs deleted page TernaryWiki:About (Broken redirect)
• 10:49, 16 April 2025 MrDyne talk contribs deleted page T729:About (Leftover from old Wiki)
• 10:48, 16 April 2025 MrDyne talk contribs moved page T729:About to About
• 19:20, 13 April 2025 MrDyne talk contribs created page MediaWiki:Monobook.css (Created page with "All CSS here will be loaded for users of the MonoBook skin: #bodyContent {font-size: 1.15em;}")
• 13:30, 13 April 2025 MrDyne talk contribs created page TernaryWiki:About (Created page with "{{DISPLAYTITLE:About}} __NOTOC__ '''"I have no clue what I'm doing. Learning and making it up as I go along."''' The T729 Ternary Computer is a hobby project that I have been working on since 2014 in my spare time. It started as a thought experiment and was a day dream project during boring college classes. I've wanted to make some kind of DIY breadboard or discrete component computer for a long while but there is already an ocean of hobby 8 and 16 bit projects out the...")
• 13:29, 13 April 2025 MrDyne talk contribs created page FPGA (Created page with "I do not have any hands-on experience with FPGAs yet and do not want to get into FPGAs until I have a stable T729 design already. I won't know what size FPGA to get until the T729 architecture is mostly complete. Large FPGAs can get quite expensive. I foresee some limitations running a ternary project on an FPGA. * FPGAs can only do binary. Must use ADC and DACs to handle analog signals. ** Only BCT implementation would work on an FPGA. * Memory...")
• 13:29, 13 April 2025 MrDyne talk contribs created page Discrete Component (Created page with "Building a discrete component ternary computer implemented in BCT would actually be quite doable with fast switching SMT MOSFETs and cheap custom PCBs. NPN/PNP CMOS logic gate layouts would result in low power usage. It would not be a cheap project but there is no reason it would not function if obviously build correctly. Another option is using standalone fast switching discrete SMT logic gates. If I ever get around to learning how to create...")
• 13:29, 13 April 2025 MrDyne talk contribs created page NZP (Created page with "Negitive, Zero, Positive logic uses negative voltage, ground, and positive voltage. This form of ternary logic is possible, but it is not power efficient. A lot of transistors will need to swing the full -V to V range which will drag down clock speeds and increase power usage. Logic zero will likely require voltage dividers which use resisters and create heat.")
• 13:29, 13 April 2025 MrDyne talk contribs created page Low Open High (Created page with "I have not yet figured out a way to do low, open, high logic yet. It may not be possible or only work with discrete components. It most likely requires resisters and diodes. Resisters create heat and getting precise values may not be practical in a fabricated chip.")
• 13:28, 13 April 2025 MrDyne talk contribs created page Binary-Coded Ternary (Created page with "<b>Binary-coded Ternary (BCT)</b> is an implementation of ternary logic built on top of normal binary logic. Using two bits or wires per trit as the base. Sub-circuits made with binary logic gates can emulate the truth tables of ternary logic gates. This implementation is useful with logic simulators and would most likely function on an FPGA. However because each trit needs two wires a design would be extremely bloated with interconnects and bus lines. Doubling the wiri...")
• 13:28, 13 April 2025 MrDyne talk contribs created page T Language (Created page with "The T language is just "C/C++" for the T729. Developing this is a far future goal.")
• 13:28, 13 April 2025 MrDyne talk contribs created page Construct (Created page with "Construct is the "assembly" programming language for the T729. Developing this is a future goal.")
• 13:28, 13 April 2025 MrDyne talk contribs created page Heptavintimal (Created page with "<b>Heptavintimal</b> is a base-27 numeral system. (Also called Septemvigesimal in language-related topics.) It is the ternary equivalent of Hexadecimal. == Styles == * '''09AQ''' (preferred style) * AZ0 * 0AZ == Chart == <div style="text-align: center; font-family: monospace;"> <table class="wikitable"> <tr> <th>Unbalanced<br />Decimal</th> <th>Balanced<br />Decimal</th> <th>09AQ</th> <th>AZ0</th> <th>0AZ</th> </tr> <tr> <td>0</td> <td>-13<...")
• 13:28, 13 April 2025 MrDyne talk contribs created page Memory (Created page with "The T729 CPU has a 12 trit address space. This lets it directly access 729 QTs (531441 Trytes) of memory. == Interesting Notes == * A trit can store log2(3) or 1.58496250072 bits of information. 729 QTs can store the equivalent of 616.92 KBs of information. Slightly more than half a Megabyte. * A Tryte at minimum can fit in 10 bits as a value. (729 < 1014) * A Tryte needs 12 bits using a Dual Binary setup. Six pairs if bits. (729 < 4096) * On a modern computer sto...")
• 13:25, 13 April 2025 MrDyne talk contribs created page Template:OPtip (Created page with "<div class="optip_a"> {{{1}}} <div class="optip_b"> {{{2}}}<br /> NME: {{{3}}}<br /> HEP: {{{4}}}<br /> DEC: {{{5}}}<br /> TRI: {{{6}}} </div> </div>")
• 13:25, 13 April 2025 MrDyne talk contribs created page Instruction Set Map (Created page with " I am currently stuck on a few things related to the instruction set. * Choosing useful instructions and addressing modes. * Filling/sorting the instruction set map first VS designing the instruction decoder first. ** Designing the instruction decoder first would result possibly in a faster, smaller, etc decoder but instructions will likely end up in a random pattern. * Laying out instructions so their negated value does the opposite. Example would be "0+0+0+" does addit...")
• 13:24, 13 April 2025 MrDyne talk contribs created page Instructions (Created page with "(Very rough list.) == ALU == * Addition * Subtraction * Multiply * Multiply-Accumulate * Negate * Sum * Any * Consensus * Eor * Compare * Maximum * Minimum * Increment * Decrement ** The Negated Form Of Everything Above == Memory == * Move * Save * Load * Push * Pop * Jump To Subroutine * Return From Subroutine == Register Shift / Rotate == * Arithmetic Shift In/Out * Logical Shifts In/Out * Arithmetic Rotate Left/Right/Up/Down * Logical Rotate Left/Right/Up/Down ** A...")
• 13:24, 13 April 2025 MrDyne talk contribs created page Registers (Created page with "== T729 CPU == <big> * A¹ * X¹ * Y¹ * Z¹ ** Z+A² * PC² * SP¹ * SF¹ </big>")
• 13:24, 13 April 2025 MrDyne talk contribs created page Magic Number (Created page with "Magic Number may mean other things in [https://en.wikipedia.org/wiki/Magic%20number%20(programming) other fields] but in the scope of this project the Magic Number refers to a number that best serves as a unit size. Humans like to assign names to units of 10, 100, 1000, etc due to our decimal number system. Binary has a very close "Magic Number" of 1024 which is 2 to the power of 10. Ternary does not align very well with decimal, so the nearest value 729 is chosen; 3 to...")
• 13:23, 13 April 2025 MrDyne talk contribs created page Data Storage (Created page with "== Ternary Data Units == Ternary does not align very well with decimal. Binary uses the Magic Number 1024 (2^10) which is very close to 1000. Ternary does not have a value that fits this well. So the closest one must be chosen. The nearest to 1000 is 729; 3 to the power of 6. Instead of borrowing binary data unit names I came up with my own unit names from the letters of Heptavintimal starting backwards. {| class="wikitable" style="text-align: center; font-fami...")
• 13:23, 13 April 2025 MrDyne talk contribs created page File:fontmap.png
• 13:23, 13 April 2025 MrDyne talk contribs uploaded File:fontmap.png
• 13:22, 13 April 2025 MrDyne talk contribs created page Terminal (Created page with "thumb|alt=Font Map|Work In Progress Font Map This is for the future web browser simulator. == Terminal == * 4:3 Color Display * 27 Colors (Front and Background) * 81 x 27 Characters * 486 x 324 Resolution * 6 x 12 Pixel Characters == Colors == {| class="wikitable" style="text-align: center; font-family: monospace;" |+ 3-trit Color Table |- ! Hep !! 3-trits !! Color !! Name !! Hex Color |- | 0 || --- || style="background: #000000" | || Black || #...")
• 13:21, 13 April 2025 MrDyne talk contribs created page Add (Ternary) (Created page with "<big><b>Ternary Addition</b></big> == Uses == Adds two inputs and a carry in together. Outputs sum and carry out. Negating the B input will result in a subtraction. == Truth Tables == <div class="tt"> <table class="tt"> <tr> <td class="tt_bb"><b>A</b></td> <td class="tt_bb"><b>B</b></td> <td class="tt_bb"><b>Ci</b></td> <td class="tt_bl tt_bb"><b>Co</b></td> <td class="tt_bb"><b>S</b></td> </tr> <tr> <td class="tt_r">-<...")
• 13:20, 13 April 2025 MrDyne talk contribs created page NOT (Binary Gate) (Created page with "== Truth Tables == <div class="tt"> <table class="tt"> <tr> <td class="tt_bb"><b>A</b></td> <td class="tt_bb"><b>B</b></td> </tr> <tr> <td>0</td> <td class="tt_bl">1</td> </tr> <tr> <td>1</td> <td class="tt_bl">0</td> </tr> </table> </div> Category:Binary Category:Logic_Gates")
• 13:20, 13 April 2025 MrDyne talk contribs created page XOR (Binary Gate) (Created page with "== Truth Tables == === XOR === <div class="tt"> <table class="tt"> <tr> <td class="tt_br tt_bb" colspan="2" rowspan="2">XOR</td> <td colspan="3" class="tce"><b>B</b></td> </tr> <tr> <td class="tt_bb">0</td> <td class="tt_bb">1</td> </tr> <tr> <td rowspan="2"><b>A</b></td> <td class="tt_br">0</td> <td>0</td> <td>1</td> </tr> <tr> <td class="tt_br">1</td> <td>1</td> <td>0</td> </tr> </table> <table class="tt"> <tr>...")
• 13:20, 13 April 2025 MrDyne talk contribs created page OR (Binary Gate) (Created page with "== Truth Tables == === OR === <div class="tt"> <table class="tt"> <tr> <td class="tt_br tt_bb" colspan="2" rowspan="2">OR</td> <td colspan="3" class="tce"><b>B</b></td> </tr> <tr> <td class="tt_bb">0</td> <td class="tt_bb">1</td> </tr> <tr> <td rowspan="2"><b>A</b></td> <td class="tt_br">0</td> <td>0</td> <td>1</td> </tr> <tr> <td class="tt_br">1</td> <td>1</td> <td>1</td> </tr> </table> <table class="tt"> <tr> <t...")
• 13:20, 13 April 2025 MrDyne talk contribs created page AND (Binary Gate) (Created page with "== Truth Tables == === AND === <div class="tt"> <table class="tt"> <tr> <td class="tt_br tt_bb" colspan="2" rowspan="2">AND</td> <td colspan="3" class="tce"><b>B</b></td> </tr> <tr> <td class="tt_bb">0</td> <td class="tt_bb">1</td> </tr> <tr> <td rowspan="2"><b>A</b></td> <td class="tt_br">0</td> <td>0</td> <td>0</td> </tr> <tr> <td class="tt_br">1</td> <td>0</td> <td>1</td> </tr> </table> <table class="tt"> <tr>...")
• 13:20, 13 April 2025 MrDyne talk contribs created page DEC (Ternary Gate) (Created page with "<big><b>Decrement</b></big> == Uses == Decrement will rotate the input down. It is used in Rotate Down operations. == Truth Table == thumb|alt=TempImage|TempImage <div class="tt"> <table class="tt"> <tr> <td colspan="2">DEC</td> </tr> <tr> <td class="tt_bb"><b>A</b></td> <td class="tt_bl tt_bb"><b>Y</b></td> </tr> <tr> <td class="tt_r">-</td> <td class="tt_bl tt_b">+</td> </tr> <tr> <td class="tt_g">0</td> <td...")
• 13:20, 13 April 2025 MrDyne talk contribs created page INC (Ternary Gate) (Created page with "<big><b>Increment</b></big> == Uses == Increment will rotate the input up. Is used in Rotate Up operations. == Truth Table == thumb|alt=TempImage|TempImage <div class="tt"> <table class="tt"> <tr> <td colspan="2">INC</td> </tr> <tr> <td class="tt_bb"><b>A</b></td> <td class="tt_bl tt_bb"><b>Y</b></td> </tr> <tr> <td class="tt_r">-</td> <td class="tt_bl tt_g">0</td> </tr> <tr> <td class="tt_g">0</td> <td class=...")
• 13:19, 13 April 2025 MrDyne talk contribs created page NEG (Ternary Gate) (Created page with "<big><b>Negate</b></big> == Uses == Negate is the ternary equivalent to the binary NOT. It inverts the input if it's not zero. == Truth Table == thumb|alt=TempImage|TempImage <div class="tt"> <table class="tt"> <tr> <td colspan="2">NEG</td> </tr> <tr> <td class="tt_bb"><b>A</b></td> <td class="tt_bl tt_bb"><b>Y</b></td> </tr> <tr> <td class="tt_r">-</td> <td class="tt_bl tt_b">+</td> </tr> <tr> <td class="tt_g">0...")
• 13:19, 13 April 2025 MrDyne talk contribs created page MAX (Ternary Gate) (Created page with "<big><b>Maximum</b></big> == Uses == Do not know if this gate is actually useful for anything yet. == Truth Tables == === MAX === thumb|alt=Max Gate Symbol|Max Gate Symbol <div class="tt"> <table class="tt"> <tr> <td class="tt_br tt_bb" colspan="2" rowspan="2">MAX</td> <td colspan="3" class="tce"><b>B</b></td> </tr> <tr> <td class="tt_r tt_bb">-</td> <td class="tt_g tt_bb">0</td> <td class="tt_b tt_bb">+</td> </tr> <tr>...")
• 13:19, 13 April 2025 MrDyne talk contribs created page MIN (Ternary Gate) (Created page with "<big><b>Minimum</b></big> == Uses == Do not know if this gate is actually useful for anything yet. == Truth Tables == === MIN === thumb|alt=Min Gate Symbol|Min Gate Symbol <div class="tt"> <table class="tt"> <tr> <td class="tt_br tt_bb" colspan="2" rowspan="2">MIN</td> <td colspan="3" class="tce"><b>B</b></td> </tr> <tr> <td class="tt_r tt_bb">-</td> <td class="tt_g tt_bb">0</td> <td class="tt_b tt_bb">+</td> </tr> <tr>...")
• 13:19, 13 April 2025 MrDyne talk contribs created page COM (Ternary Gate) (Created page with "<big><b>Compare</b></big> == Uses == A tree of compares can compute if a register is negative, zero, or positive. This is done as part of the ALU Flags. I do not know yet if this gate is useful to Compare say two registers. This gate is biased towards the A input. Only when A is zero does B have any effect. == Truth Tables == === COM === thumb|alt=Com Gate Symbol|Com Gate Symbol <div class="tt"> <table class="tt"> <tr> <td class="tt_br tt_...")
• 13:19, 13 April 2025 MrDyne talk contribs created page EOR (Ternary Gate) (Created page with "<big><b>Ternary XOR</b></big> thumb|Eor Gate Symbol thumb|BCT NEOR Gate == Uses == Useful as a controllable Buffer or Negate. The negated form NEOR is useful to toggle between add and subtract modes within an Adder. == Truth Tables == === EOR === <div class="tt"> <table class="tt"> <tr> <td class="tt_br tt_bb" colspan="2" rowspan="2">EOR</td> <td colspan="3" class="tce"><b>B</b></td> </tr>...")
• 13:18, 13 April 2025 MrDyne talk contribs created page ANY (Ternary Gate) (Created page with "<big><b>Any</b></big> thumb|Any Gate Symbol thumb|BCT Any Gate == Uses == ANY gate is the ternary equivalent to the binary OR gate. The negated form NANY is a universal gate just like binary NOR. Every other logic gate can be made with the correct partern of NANY gates. == Truth Tables == === ANY === <div class="tt"> <table class="tt"> <tr> <td class="tt_br tt_bb" colspan="2" r...")
• 13:16, 13 April 2025 MrDyne talk contribs created page CON (Ternary Gate) (Created page with "<big><b>Consensus</b></big> thumb|Con Gate Symbol thumb|BCT Con Gate == Uses == CON gate is the ternary equivalent to the Binary AND. The Negated form NCON is a universal gate just like Binary NAND. Every other logic gate can be made with the correct pattern of NCON gates. == Truth Tables == === CON === <div class="tt"> <table class="tt"> <tr> <td class...")
• 13:16, 13 April 2025 MrDyne talk contribs created page SUM (Ternary Gate) (Created page with "<big><b>Modulo-3 Sum</b></big> thumb|Sum Gate Symbol thumb|BCT Sum Gate == Uses == While there is a Ternary XOR gate, it's usefulness does not fit with what the Binary XOR can do. Another gate is needed to perform ternary addition. SUM does mod 3 addition, returning the remainder. It is also useful for cryptography and error correction being balanced, self-negating, associative, and...")
• 13:03, 13 April 2025 MrDyne talk contribs created page File:ternary quantum bird meme.png
• 13:03, 13 April 2025 MrDyne talk contribs uploaded File:ternary quantum bird meme.png
• 13:01, 13 April 2025 MrDyne talk contribs created page Quantum (Created page with "thumb|right|alt=Quantum Meme|Quantum Meme A few people have brought to my attention that quantum computing can do / does three states when I bring up my project. At this time I have zero desire to explore quantum computing for this project. Although, if you have an interesting tid-bit on quantum and ternary logic still feel free to contact me.")
• 13:00, 13 April 2025 MrDyne talk contribs created page Ternary vs Binary (Created page with "<p> Binary is flat out the better easier cheaper option for computing due to the very nature of how transistors work and current fabrication technology. However it does not mean we can't still explore ternary computer design. </p> <p> Maybe in the future someone will discover a semiconductor or material/atomic science electrical switch that supports three states as intrinsically as transistors and binary. </p> <p> Balanced ternary is almost 'pretty'. It handles negative...")
• 13:00, 13 April 2025 MrDyne talk contribs created page Current Focus (Created page with "== Circuitverse == * Optimizing Multiplier to Speed Up Result Output ** Parallelizing Adds (A+B)+(C+D)+(E+F) ** Multiplier Specific Carry Select Adder ** Karatsuba Algorithm? == Hung Up On == * Opcodes Operands Addressing Modes ** Choosing Registers ** Choosing Instructions *** Ordering Instructions ** Choosing Addressing Modes == Exploring Ideas == * Expanding from 6-trit to 9-trit. ** Instruction decoding would be easier. 6 trits for opcode and 3 trits for addressing...")
• 12:54, 13 April 2025 MrDyne talk contribs created page Project Goals (Created page with "I have many goals for this project that all overlap. * Developing a ternary computer architecture that everything else is based on. * Creating a web browser simulator based around the architecture that spoofs an "alt-history" late 1980s to early 1990s ternary home PC. * Physical implementation of the architecture. FPGA, discrete components, ASIC, or custom chip. * The first T729 design will be simple, inspiration drawn from classic 8-bit CPUs like the [https://en.wik...")