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  1. AI Notice
  2. ALU
  3. AND (Binary Gate)
  4. ANY (BCT)
  5. ANY (Ternary Gate)
  6. About
  7. Add (Ternary)
  8. Adder (BCT)
  9. Binary-Coded Ternary
  10. CAD (Ternary Gate)
  11. COM (Ternary Gate)
  12. CON (BCT)
  13. CON (Ternary Gate)
  14. Construct
  15. Current Focus
  16. Custom Chip
  17. Data Storage
  18. FPGA
  19. Full Adder (BCT)
  20. Full Adder (Logic)
  21. Half Adder (BCT)
  22. Heptavintimal
  23. Incrementer (BCT)
  24. Index
  25. Instruction Set Map
  26. Instructions
  27. Low Open High
  28. MAX (Ternary Gate)
  29. MIN (Ternary Gate)
  30. MUL (BCT)
  31. MUL (Ternary Gate)
  32. MUX (BCT)
  33. Magic Number
  34. Memory
  35. Multiplier (BCT)
  36. Multiply (Ternary)
  37. NEG (BCT)
  38. NEG (Ternary Gate)
  39. NOT (Binary Gate)
  40. NTB (Ternary Gate)
  41. NZP
  42. OR (Binary Gate)
  43. PTB (Ternary Gate)
  44. Project Goals
  45. Quantum
  46. RDN (BCT)
  47. RDN (Ternary Gate)
  48. RUP (BCT)
  49. RUP (Ternary Gate)
  50. Registers

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